A 32-bit VLSI CPU chip

• Published in: IEEE journal of solid-state circuits Vol. 16; no. 5; pp. 537 - 542
• Main Authors: Beyers, J.W., Dohse, L.J., Fucetola, J.P., Kochis, R.L., Lob, C.G., Taylor, G.L., Zeller, E.R.
• Format: Journal Article
• Language: English
• Published: IEEE 01.10.1981
• Subjects: Central Processing Unit; Clocks; Costs; Productivity; Programmable logic arrays; Read only memory; System performance; Testing; Transistors; Very large scale integration
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.1981.1051634

A fully integrated 32-bit VLSI CPU chip utilizing 1 /spl mu/m features is described. It is fabricated in an n-channel silicon gate, self-aligned technology. The chip contains about 450000 transistors and executes microinstructions at approximately one per 55 ns clock cycle. It can execute a 32-bit binary integer add in 55 ns, a 32-bit binary integer multiply in 1.8 /spl mu/s, and a 64-bit floating point multiply in 10.4 /spl mu/s. The instruction set provides the functions of an advanced mainframe CPU. Because the implementation of such a complex device poses an organizational as well as a technical challenge, the design philosophy that was adopted is summarized briefly. Careful attention was paid to designer productivity, and design flexibility and testability.