Fringing-Induced Drain Current Improvement in the Tunnel Field-Effect Transistor With High- \kappa Gate Dielectrics
The tunnel field-effect transistor (tunnel FET) is a promising candidate for future CMOS technology. Its device characteristics have been subject to a variety of experimental and theoretical studies. In this paper, we evaluate the influence of using a high-kappa gate dielectric in the tunnel FET com...
Saved in:
Published in | IEEE transactions on electron devices Vol. 56; no. 1; pp. 100 - 108 |
---|---|
Main Authors | , , , , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
IEEE
01.01.2009
Institute of Electrical and Electronics Engineers |
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | The tunnel field-effect transistor (tunnel FET) is a promising candidate for future CMOS technology. Its device characteristics have been subject to a variety of experimental and theoretical studies. In this paper, we evaluate the influence of using a high-kappa gate dielectric in the tunnel FET compared to a standard silicon oxide with same equivalent oxide thickness, which exhibits a quite different behavior compared to a conventional MOSFET due to its totally different working principle. It turns out that the fringing field effect, while deteriorating conventional MOSFET characteristics, leads to a much higher on-current comparable with actual conventional MOSFETs, a subthreshold slope of the tunnel FET lower than the theoretical limit for conventional MOSFETs, and a massive improved inverter delay, underlining its prospect for future applications. This leads to the conclusion that high-kappa materials with permittivities > 30 can advantageously be used in CMOS technology, giving rise to further technological development. |
---|---|
Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0018-9383 |
DOI: | 10.1109/TED.2008.2008375 |