ESD-Protected K-Band Low-Noise Amplifiers Using RF Junction Varactors in 65-nm CMOS

• Published in: IEEE transactions on microwave theory and techniques Vol. 59; no. 12; pp. 3455 - 3462
• Main Authors: Ming-Hsien Tsai, Hsu, S. S. H., Fu-Lung Hsueh, Chewn-Pu Jou
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.12.2011; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Amplifiers; Charge-device-model (CDM); CMOS; Devices; Electrostatic discharge; electrostatic discharge (ESD); Failure; Integrated circuit modeling; junction varactor; Logic gates; low-noise amplifier (LNA); Low-noise amplifiers; MOS; Noise levels; Power gain; Radio frequencies; Radio frequency; radio frequency (RF); transmission line pulse (TLP); Varactors; very fast transmission line pulse (VFTLP)
• ISSN: 0018-9480; 1557-9670
• DOI: 10.1109/TMTT.2011.2170582

This paper presents two K-band low-noise amplifiers (LNAs) in 65-nm CMOS using the proposed RF junction varactors as the ESD protection devices. The junction varactors are customized for the RF ESD applications with accurate equivalent circuit models. The experimental results demonstrate excellent second breakdown currents ( It 2 ) and high ratios of the ESD level to parasitic capacitances ( V ESD / C ESD ) . Using the dual-diode topology, the first LNA demonstrates an over 2-kV Human-Body-Model (HBM) ESD protection level with a noise figure (NF) of 2.8 dB and a peak gain of 14.3 dB at around 24 GHz under a power consumption of only 7 mW. By incorporating an RF junction varactor as the extra gate-source capacitance at the input stage as a part of the ESD network, the second LNA presents an enhanced failure current level up to 2.6 A (corresponding to an HBM ESD level of 3.9 kV), and a Charge-Device-Model (CDM) ESD level up to 10.7 A, characterized by the Very Fast Transmission Line Pulse (VFTLP) tests. The second LNA shows a NF of 3.2 dB and a power gain of 13.7 dB, also under 7 mW.