A Step-Up Switched-Capacitor Multilevel Inverter With Self-Voltage Balancing

• Published in: IEEE transactions on industrial electronics (1982) Vol. 61; no. 12; pp. 6672 - 6680
• Main Authors: Yuanmao Ye, Cheng, K. W. E., Junfeng Liu, Kai Ding
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.12.2014; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Balancing; Capacitors; Driver circuits; Electric potential; Harmonic analysis; Inverters; Modulation; Multilevel; Pulse width modulation; Topology; Voltage; H-bridge; switched capacitor (SC); multilevel inverter; selective harmonic elimination (SHE); sinusoidal pulsewidth modulation (SPWM)
• ISSN: 0278-0046; 1557-9948
• DOI: 10.1109/TIE.2014.2314052

The objective of this paper is to propose a new inverter topology for a multilevel voltage output. This topology is designed based on a switched capacitor (SC) technique, and the number of output levels is determined by the number of SC cells. Only one dc voltage source is needed, and the problem of capacitor voltage balancing is avoided as well. This structure is not only very simple and easy to be extended to a higher level, but also its gate driver circuits are simplified because the number of active switches is reduced. The operational principle of this inverter and the targeted modulation strategies are presented, and power losses are investigated. Finally, the performance of the proposed multilevel inverter is evaluated with the experimental results of an 11-level prototype inverter.