HARDROC3, a 3rd generation ASIC with zero suppress for ILC Semi Digital Hadronic Calorimeter

HARDROC is the front end chip designed to read out the Resistive Plate Chambers foreseen for the Digital HAdronic CALorimeter (DHCAL) of the future International Linear Collider. The very fine granularity of the calorimeter implies thousands of electronics channels per cubic meter which is a new fea...

Full description

Saved in:
Bibliographic Details
Published inJournal of instrumentation Vol. 12; no. 2; p. C02038
Main Authors Dulucq, F., Callier, S., Taille, C. de La, Martin-Chassard, G., Seguin-Moreau, N., Zoccarato, Y.
Format Journal Article
LanguageEnglish
Published 01.02.2017
Subjects
Calorimetry
Channels
Chips
Digital
Electronics
Instrumentation
Measuring instruments
Power consumption
Online AccessGet full text

Cover

More Information
Summary:HARDROC is the front end chip designed to read out the Resistive Plate Chambers foreseen for the Digital HAdronic CALorimeter (DHCAL) of the future International Linear Collider. The very fine granularity of the calorimeter implies thousands of electronics channels per cubic meter which is a new feature of "imaging" calorimetry. Moreover, for compactness, chips must be embedded inside the detector making crucial the reduction of the power consumption down to 12 [mu] W per channel. This is achieved using power-pulsing and online zero-suppression. Around 800 HARDROC3 were produced in 2015. The overall performance and production tests will be detailed.
Bibliography:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 23
ISSN:1748-0221
1748-0221
DOI:10.1088/1748-0221/12/02/C02038