Design of a GaN Totem-Pole PFC Converter Using DC-Link Voltage Control Strategy for Data Center Applications

• Published in: IEEE access Vol. 10; pp. 50278 - 50287
• Main Authors: Lee, Jia-You, Chen, Jheng-Hung, Lo, Kuo-Yuan
• Format: Journal Article
• Language: English
• Published: Piscataway IEEE 2022; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Bridge circuits; Capacitors; Computer centers; Data buses; Data centers; DC-link voltage control; Efficiency; Electric potential; Gallium nitrides; Harmonic distortion; High electron mobility transistors; hold-up time; Power converters; Power factor; Power supplies; Prototypes; Semiconductor devices; server power supply; Servers; Switches; Totem-pole PFC; Voltage; Voltage control
• ISSN: 2169-3536; 2169-3536
• DOI: 10.1109/ACCESS.2022.3173606

In today's power industry, a compact and highly efficient power converter is the main component for server power applications. The objective of this paper is to propose a totem-pole power factor correction (PFC) converter with DC-link voltage control strategies for data center applications. Gallium Nitride High Electron Mobility Transistors (GaN HEMTs) are also used to increase power density and conversion efficiency without the reverse recovery loss. With the derived equations of the converter loss, the dc-bus voltage control strategy is proposed to improve the conversion efficiency. Furthermore, this paper proposes the hold-up time extension method to increase the DC bus voltage under heavy load conditions. The reduction of the DC link capacitor capacitance is achievable, and the power factor can be improved in a wide range. A 2.9-kW GaN totem-pole PFC prototype is developed and fabricated to verify this paper's theoretical analysis. As demonstrated in the prototype's experimental results, the tested peak efficiency is 98.5% and the tested total harmonic distortion (THD) is less than 3%.