Testability Evaluation in Time-Variant Circuits: A New Graphical Method

DC–DC converter fault diagnosis, executed via neural networks built by exploiting the information deriving from testability analysis, is the subject of this paper. The networks under consideration are complex valued neural networks (CVNNs), whose fundamental feature is the proper treatment of the ph...

Full description

Saved in:
Bibliographic Details
Published inElectronics (Basel) Vol. 11; no. 10; p. 1589
Main Authors Bindi, Marco, Piccirilli, Maria Cristina, Luchetta, Antonio, Grasso, Francesco, Manetti, Stefano
Format Journal Article
LanguageEnglish
Published Basel MDPI AG 01.05.2022
Subjects
Online AccessGet full text
ISSN2079-9292
2079-9292
DOI10.3390/electronics11101589

Cover

Loading…
More Information
Summary:DC–DC converter fault diagnosis, executed via neural networks built by exploiting the information deriving from testability analysis, is the subject of this paper. The networks under consideration are complex valued neural networks (CVNNs), whose fundamental feature is the proper treatment of the phase and the information contained in it. In particular, a multilayer neural network based on multi-valued neurons (MLMVN) is considered. In order to effectively design the network, testability analysis is exploited. Two possible ways for executing this analysis on DC–DC converters are proposed, taking into account the single-fault hypothesis. The theoretical foundations and some applicative examples are presented. Computer programs, based on symbolic analysis techniques, are used for both the testability analysis and the neural network training phase. The obtained results are very satisfactory and demonstrate the optimal performances of the method.
Bibliography:ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 14
ISSN:2079-9292
2079-9292
DOI:10.3390/electronics11101589