TAISAM: A Transistor Array-Based Test Method for Characterizing Heavy Ion-Induced Sensitive Areas in Semiconductor Materials

• Published in: Electronics (Basel) Vol. 11; no. 13; p. 2043
• Main Authors: Shao, Jinjin, Song, Ruiqiang, Chi, Yaqing, Liang, Bin, Wu, Zhenyu
• Format: Journal Article
• Language: English
• Published: Basel MDPI AG 01.07.2022
• Subjects: Arrays; Circuit design; Circuits; Heavy ions; Integrated circuits; Metal oxide semiconductors; Parameter sensitivity; Semiconductor devices; Semiconductor materials; Semiconductors; Soft errors; Test methods; Transistors
• ISSN: 2079-9292; 2079-9292
• DOI: 10.3390/electronics11132043

The heavy ion-induced sensitive area is an essential parameter for space application integrated circuits. Circuit Designers need it to evaluate and mitigate heavy ion-induced soft errors. However, it is hard to measure this parameter due to the lack of test structures and methods. In this paper, a test method called TAISAM was proposed to measure the heavy ion-induced sensitive area. TAISAM circuits were irradiated under the heavy ions. The measured sensitive areas are 1.75 μm2 and 1.00 μm2 with different LET values. TAISAM circuits are also used to investigate the layout structures that can affect the sensitive area. When the source region of the target transistor is floating, the heavy ion-induced sensitive area decreases by 28.5% for the target PMOS transistor while it increases by more than 28% for the target NMOS transistor. When the well contacts are added, the heavy ion-induced sensitive area decreases by more than 25% for the target PMOS transistor while it remains unchanged for the target NMOS transistor. Experimental results directly validate that the two structures significantly affect the heavy ion-induced sensitive area.