Partitioning-Based Approach to Fast On-Chip Decoupling Capacitor Budgeting and Minimization

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 25; no. 11; pp. 2402 - 2412
• Main Authors: Hang Li, Fan, J., Zhenyu Qi, Tan, S.X.-D., Lifeng Wu, Cai, Y., Hong, X.
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.11.2006; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Adjoints; Algorithm design and analysis; Algorithms; Budgeting; Capacitance; Capacitors; Character generation; Circuits; Decoupling; Decoupling capacitor; Minimization; Minimization methods; on-chip power/grid networks; Optimization; Optimization methods; Partitioning algorithms; Searching; Studies; Time domain analysis; Very large scale integration
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2006.870862

This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today's very large scale integration physical design. The new method is based on a sensitivity-based conjugate gradient (CG) approach. But several new techniques that significantly improve the efficiency of the optimization process were adopted. First, an efficient search step scheme to replace the time-consuming line search phase in the conventional CG method for decap budget optimization was proposed. Second, instead of optimizing an entire large circuit, the circuit is partitioned into a number of smaller subcircuits and optimized separately by exploiting the locality of adding decaps. Third, the time-domain merged adjoint method was applied to compute the sensitivity information and show that the partitioning-based merged adjoint method leads to better results than the flat merged adjoint method with the improved search scheme. Experimental results show that the proposed algorithm achieves at least ten times speed-up over similar decap allocation methods reported so far with similar budget quality, and a power grid circuit with about one million nodes can be optimized using the new method in half an hour on the latest Linux workstations