Prediction and Modeling of Thin Gate Oxide Breakdown Subject to Arbitrary Transient Stresses

• Published in: IEEE transactions on electron devices Vol. 57; no. 9; pp. 2296 - 2305
• Main Authors: Ellis, D F, Yuanzhong Zhou, Salcedo, J A, Hajjar, J, Liou, J J
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.09.2010; Institute of Electrical and Electronics Engineers; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Applied sciences; Breakdown voltage; Charged device model (CDM); Dielectrics; Electric breakdown; Electronic equipment and fabrication. Passive components, printed wiring boards, connectics; Electronics; Exact sciences and technology; gate oxide breakdown (GOB); power law (PL); Predictive models; Stress; time-dependent dielectric breakdown (TDDB); Transient analysis; very fast transmission line pulse (VFTLP); Voltage measurement; Stress analysis; very fast transmission line pulse (VFTLP); Electric breakdown; Oxide layer; Electric stress; time-dependent dielectric breakdown (TDDB); Transistor gate; Charged device model; Charged device model (CDM); Modeling; gate oxide breakdown (GOB); Time dependence; Transmission line; Gate oxide; power law (PL); Percolation; Reliability; Power law; Damaging
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/TED.2010.2053864

A reliable dielectric breakdown model under transient stresses via an extension of the power law is demonstrated. The model, which is based on the percolation model and the assumption of no significant detrapping, is successfully used in ramped voltage stress breakdown analysis. A demonstration of the model's validity consists of applying repetitive time-variant voltage waveforms-pulses, sine waves, ramps, and noise-until breakdown and, consequently, comparing prediction to reality. The breakdown distribution is initially derived from DC measurements, with the model predicting both the center and the shape of the distribution.