Analog-binary CCD correlator: A VLSI signal processor

• Published in: IEEE transactions on electron devices Vol. 26; no. 4; pp. 596 - 603
• Main Authors: Gandolfo, D.A., Tower, J.R., Pridgen, J.I., Munroe, S.C.
• Format: Journal Article
• Language: English
• Published: IEEE 01.04.1979
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/T-ED.1979.19465

Advanced analog-binary CCD correlators will be useful in spread spectrum communications and radar systems employing PRN codes. Increased code-length capability and on-chip support circuitry drive chip size and density into the VLSI domain. Designs of key sections of a 512-stage correlator are discussed. The chip measures nearly 400 by 300 mils and contains all circuits necessary to accept and store a reference code and compare it to a signal. In addition, it contains many support circuits including the clock logic and drivers, code load logic, and TTL-to-MOS converters. Design of the floating-gate tap structure minimizes code-dependent bias, harmonic distortion, and tap-to-tap nonuniformity, while holding power dissipation to 1 mW per tap. Electron-beam lithography was used to produce photomasks with low defect density and tight dimensional tolerances over the array.