A Thermal Isolation Technique Using Through-Silicon Vias for Three-Dimensional ICs
This brief proposes a guard ring using through-silicon vias (TSVs) to isolate thermal coupling in a 3-D integrated circuit (3-D IC). To verify this idea, simulation and measurement are carried out. A ring oscillator (RO) is implemented in a 65-nm CMOS and then measured in four different conditions....
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Published in | IEEE transactions on electron devices Vol. 60; no. 3; pp. 1282 - 1287 |
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Main Authors | , , , , , , , , , , , |
Format | Journal Article |
Language | English |
Published |
New York, NY
IEEE
01.03.2013
Institute of Electrical and Electronics Engineers The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | This brief proposes a guard ring using through-silicon vias (TSVs) to isolate thermal coupling in a 3-D integrated circuit (3-D IC). To verify this idea, simulation and measurement are carried out. A ring oscillator (RO) is implemented in a 65-nm CMOS and then measured in four different conditions. The results show that, without affecting the inherent electrical performance of the RO, the designed TSV ring shields the RO from high-temperature environments. The oscillation frequency shifting is mitigated from 5.96 MHz without TSV to 2.11 MHz with the proposed TSV ring. This TSV-based structure provides a good option to alleviate thermal coupling in a highly integrated 3-D IC. |
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ISSN: | 0018-9383 1557-9646 |
DOI: | 10.1109/TED.2013.2243452 |