A Thermal Isolation Technique Using Through-Silicon Vias for Three-Dimensional ICs

This brief proposes a guard ring using through-silicon vias (TSVs) to isolate thermal coupling in a 3-D integrated circuit (3-D IC). To verify this idea, simulation and measurement are carried out. A ring oscillator (RO) is implemented in a 65-nm CMOS and then measured in four different conditions....

Full description

Saved in:
Bibliographic Details
Published inIEEE transactions on electron devices Vol. 60; no. 3; pp. 1282 - 1287
Main Authors Sanming Hu, Hoe, Yen Yi Germaine, Hongyu Li, Dan Zhao, Jinglin Shi, Yong Han, Keng Hwa Teo, Yong Zhong Xiong, Jin He, Xiaowu Zhang, Minkyu Je, Madihian, M.
Format Journal Article
LanguageEnglish
Published New York, NY IEEE 01.03.2013
Institute of Electrical and Electronics Engineers
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:This brief proposes a guard ring using through-silicon vias (TSVs) to isolate thermal coupling in a 3-D integrated circuit (3-D IC). To verify this idea, simulation and measurement are carried out. A ring oscillator (RO) is implemented in a 65-nm CMOS and then measured in four different conditions. The results show that, without affecting the inherent electrical performance of the RO, the designed TSV ring shields the RO from high-temperature environments. The oscillation frequency shifting is mitigated from 5.96 MHz without TSV to 2.11 MHz with the proposed TSV ring. This TSV-based structure provides a good option to alleviate thermal coupling in a highly integrated 3-D IC.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2013.2243452