Modeling and Radiation Effects Study of an LSI/MOS Logic System

• Published in: IEEE transactions on nuclear science Vol. 18; no. 6; pp. 263 - 272
• Main Authors: Habing, D. H., Shafer, B. D.
• Format: Journal Article
• Language: English
• Published: IEEE 01.01.1971
• Subjects: Circuit testing; Equations; Large scale integration; Logic arrays; Logic circuits; Logic devices; Logic testing; Predictive models; Radiation effects; Semiconductor device measurement
• ISSN: 0018-9499; 1558-1578
• DOI: 10.1109/TNS.1971.4326442

This paper presents the results of a comprehensive modeling and radiation effects study of a p-channel enhancement mode LSI/MOS test chip (TC) specifically designed to allow measurement of discrete device type parameters and responses for circuits constructed from similar devices on a common chip. Particular emphasis was given to the development of accurate models of the individual devices and to the demonstration of the use of these models in predicting the radiation responses of the circuits on the chip. Ionization dose and neutron effects were determined for each of the parameters used in the model which contained the basic Sah equations modified to include channel length modulation effects, the body effect, and the electric-field-dependence of channel mobility. Average values of these parameters were then used in predictions of pre- and post-radiation responses for circuits.