A 44.3-mW 62.4-fps Hyperspectral Image Processor for Spectral Unmixing in MAV Remote Sensing
This article presents the first dedicated processor designed to support the complete spectral unmixing workflow for hyperspectral image (HSI) processing, including rank reduction, endmember extraction, and abundance estimation. The design employs architecture explorations, including folding and data...
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Published in | IEEE journal of solid-state circuits Vol. 60; no. 5; pp. 1818 - 1829 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.05.2025
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | This article presents the first dedicated processor designed to support the complete spectral unmixing workflow for hyperspectral image (HSI) processing, including rank reduction, endmember extraction, and abundance estimation. The design employs architecture explorations, including folding and data interleaving, to reduce hardware complexity. To enhance the throughput, the processor incorporates deeply pipelined reconfigurable processing elements (PEs) for compute-intensive tasks involved in spectral unmixing. The proposed sparsity-adaptive clocking technique leverages data sparsity and minimizes dynamic power consumption. Fabricated in a 40-nm CMOS technology, the proposed processor occupies a core area of 2.56 mm2. The chip consumes 44.3 mW of power at a clock frequency of 175 MHz from a 0.68-V supply. The processor can concurrently generate eight endmembers and their associated abundances for a <inline-formula> <tex-math notation="LaTeX">{256}{\times }{ 256}{\times }64 </tex-math></inline-formula> HSI, resulting in a throughput of 62.4 fps. Comparative analysis with a high-end CPU demonstrates a significant processing speed improvement of <inline-formula> <tex-math notation="LaTeX">544{\times } </tex-math></inline-formula>, accompanied by energy efficiency that is 1735<inline-formula> <tex-math notation="LaTeX">537{\times } </tex-math></inline-formula> higher and area efficiency that is 31<inline-formula> <tex-math notation="LaTeX">647{\times } </tex-math></inline-formula> higher. The proposed processor is <inline-formula> <tex-math notation="LaTeX">17.5{\times } </tex-math></inline-formula> faster, with 236<inline-formula> <tex-math notation="LaTeX">735{\times } </tex-math></inline-formula> higher energy efficiency and <inline-formula> <tex-math notation="LaTeX">4158{\times } </tex-math></inline-formula> higher area efficiency in comparison to a high-end graphics processing unit (GPU). The proposed processor provides a promising solution to support real-time hyperspectral remote sensing, particularly for battery-powered micro air vehicles (MAVs). |
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Bibliography: | ObjectType-Article-1 SourceType-Scholarly Journals-1 ObjectType-Feature-2 content type line 14 |
ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/JSSC.2024.3456889 |