Thermally Robust High‐Resistance Layers on Low‐Resistance Silicon Synthesized by Molecular CO+ Ion Implantation

• Published in: Physica status solidi. A, Applications and materials science Vol. 218; no. 23
• Main Authors: Popov, Vladimir P., Tarkov, Sergey M., Tikhonenko, Fedor V., Antonov, Valentin A., Tyschenko, Ida E., Simakin, Sergey G., Rudenko, Konstantin V.
• Format: Journal Article
• Language: English
• Published: Weinheim Wiley Subscription Services, Inc 01.12.2021
• Subjects: Antidots; Argon; Blistering; Carbon monoxide; Carrier transport; Chemical synthesis; CO+-implanted Cz−silicon; Current carriers; Heat treatment; High resistance; high-resistivity−trap-reach silicon-on-insulator wafers; Inclusions; Insulation; Ion implantation; Molecular ions; P-n junctions; Silicon; Silicon dioxide; Silicon substrates; thermally robust high-resistance layers
• ISSN: 1862-6300; 1862-6319
• DOI: 10.1002/pssa.202100109

Using nanoscale inclusions of a wide‐band SiC semiconductor and SiO2 dielectric formed in CO+ molecular ion‐implanted (COII) layers allows creating highly resistive regions inside a moderate‐doped silicon substrate. Contrary to the well‐known implanted proton or argon‐ion insulation, where the high resistance is provided by the unstable radiation defect Fermi‐level pinning, such two‐type antidots form a bend of the silicon bandgap on the heteroboundaries around them, similar to the insulating layer in the p−n junction, and guarantee the absence of mobile charge carrier transport at a certain concentration of antidots and working temperatures below 400 K. These insulating regions save their properties even after hard thermal treatment (1400 K). Moreover, a gas blistering suppression is observed for the silicon‐on‐insulator (SOI) wafers with an ultrathin (10–40 nm) buried oxide (BOX). SIMS measurements demonstrate the strong mobile impurity accumulation at the COII region during subsequent thermal treatments. The gettering layer formation in CO ion‐implanted regions of n‐ and p‐type Czochralsky silicon wafers and in silicon‐on‐insulator (SOI) structures is demonstrated after the processes of direct bonding and/or thermal oxidation at 1100 °C. A model for the few‐micrometer space charge region formation and the interface state decrease by oxygen‐ and carbon‐ containing precipitates is proposed.