Very‐Low‐Temperature Integrated Complementary Graphene‐Barristor‐Based Inverter for Thin‐Film Transistor Applications

Complementary graphene‐barristor‐based inverters using n‐type ZnO:N and p‐type dinaphtho‐[2,3‐b:2′,3′‐f]thieno[3,2‐b]thiophene semiconductor layers are fabricated at a maximum process temperature lower than 200 °C. The devices display on/off ratios greater than 104. The transmittance of the device s...

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Bibliographic Details
Published inAnnalen der Physik Vol. 530; no. 10
Main Authors Heo, Sunwoo, Lee, Ho‐In, Lee, Hyeji, Kim, Seung‐Mo, Kim, Kiyung, Kim, Yun Ji, Kim, So‐Young, Kim, Ji Hwan, Yoon, Myung‐Han, Lee, Byoung Hun
Format Journal Article
LanguageEnglish
Published Weinheim Wiley Subscription Services, Inc 01.10.2018
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Summary:Complementary graphene‐barristor‐based inverters using n‐type ZnO:N and p‐type dinaphtho‐[2,3‐b:2′,3′‐f]thieno[3,2‐b]thiophene semiconductor layers are fabricated at a maximum process temperature lower than 200 °C. The devices display on/off ratios greater than 104. The transmittance of the device stack is higher than 80% at wavelengths larger than 470 nm. The complementary graphene‐barristor inverter exhibits a high gain (>8 at VDD = 2 V) by using a back‐gate structure, which allows for aggressive gate‐dielectric scaling. The potential performance of the inverter, as projected using experimental device parameters, shows that a very high voltage gain of over 70 and a low switching power consumption of below 10 nW can be achieved at VDD = 2 V and an equivalent oxide thickness of 1 nm. These performances are very promising for thin‐film transistor applications. The feasibility of complementary graphene‐barristor‐based inverters fabricated on a transparent substrate for thin‐film transistor applications is examined. The inverter function is demonstrated with a high gain over 8. The maximum process temperature for the entire device fabrication is lower than 200 °C. These properties are competitive when compared with those of other devices being investigated for future display‐driver circuit applications.
ISSN:0003-3804
1521-3889
DOI:10.1002/andp.201800224