Discrete Orthogonal Multi-transform on Chip (DOMoC)

• Published in: Journal of signal processing systems Vol. 91; no. 5; pp. 437 - 457
• Main Authors: M, Mohamed Asan Basiri, Sk, Noor Mahammad
• Format: Journal Article
• Language: English
• Published: New York Springer US 15.05.2019; Springer Nature B.V
• Subjects: Circuits and Systems; Computer Imaging; Data compression; Electrical Engineering; Engineering; Image compression; Image Processing and Computer Vision; Mathematical analysis; Matrix algebra; Matrix methods; Orthogonal Frequency Division Multiplexing; Pattern Recognition; Pattern Recognition and Graphics; Signal,Image and Speech Processing; Speech processing; Trigonometric functions; Video compression; Vision; DFT; Hartley transform; DCT; DST; High performance computing; Walsh-Hadamard transform; FFT; Orthogonal transform; Slant transform; DSP processor; Haar transform
• ISSN: 1939-8018; 1939-8115
• DOI: 10.1007/s11265-017-1322-y

The modern real time applications such as orthogonal frequency division multiplexing, data/image/video compression, speech processing, and etc., demand high performance discrete orthogonal transform designs with lesser area/power and delay. This paper proposes two kinds of architectures to perform multiple N -point 1D-discrete orthogonal transforms on single chip. They are FFT parallel architecture based and matrix-vector multiplier based. The proposed architectures have the feasibility to perform N or N 2 or N 4 or N 8 -point discrete forward/reverse orthogonal transforms, where FFT, discrete Cosine, Sine, Haar, Hartley, Slant, and Walsh-Hadamard transforms are considered. The novelty with proposed architectures is the provision of multiple transforms using the single hardware. The frequency of the proposed 16-point FFT parallel architecture based and matrix-vector multiplier based 1D-discrete orthogonal transform architectures are 110.9 MHz and 26.65 MHz using 45 nm technology respectively.