Charge trapping in surface accumulation layer of heavily doped junctionless nanowire transistors

We investigate the conductivity characteristics in the surface accumulation layer of a junctionless nanowire transistor fabricated by the femtosecond laser lithography on a heavily n-doped silicon-on-insulator wafer. The conductivity of the accumulation region is totally suppressed when the gate vol...

Full description

Saved in:
Bibliographic Details
Published inChinese physics B Vol. 24; no. 12; pp. 587 - 591
Main Author 马刘红 韩伟华 王昊 杨香 杨富华
Format Journal Article
LanguageEnglish
Published 01.12.2015
Subjects
Online AccessGet full text

Cover

Loading…