A Practical Framework to Study Low-Power Scheduling Algorithms on Real-Time and Embedded Systems

• Published in: Journal of low power electronics and applications Vol. 4; no. 2; pp. 90 - 109
• Main Authors: Lin, Jian, Cheng, Albert M K, Song, Wei
• Format: Journal Article
• Language: English
• Published: Basel MDPI AG 07.05.2014
• Subjects: Algorithms; Design engineering; Dynamical systems; Dynamics; low-power; Real time; real-time/embedded systems; Scheduling; Very large scale integration
• ISSN: 2079-9268; 2079-9268
• DOI: 10.3390/jlpea4020090

With the advanced technology used to design VLSI (Very Large Scale Integration) circuits, low-power and energy-efficiency have played important roles for hardware and software implementation. Real-time scheduling is one of the fields that has attracted extensive attention to design low-power, embedded/real-time systems. The dynamic voltage scaling (DVS) and CPU shut-down are the two most popular techniques used to design the algorithms. In this paper, we firstly review the fundamental advances in the research of energy-efficient, real-time scheduling. Then, a unified framework with a real Intel PXA255 Xscale processor, namely real-energy, is designed, which can be used to measure the real performance of the algorithms. We conduct a case study to evaluate several classical algorithms by using the framework. The energy efficiency and the quantitative difference in their performance, as well as the practical issues found in the implementation of these algorithms are discussed. Our experiments show a gap between the theoretical and real results. Our framework not only gives researchers a tool to evaluate their system designs, but also helps them to bridge this gap in their future works.