An LDMOS with large SOA and low specific on-resistance

An LDMOS with nearly rectangular-shape safe operation area （SOA） and low specific on-resistance is proposed. By utilizing a split gate, an electron accumulation layer is formed near the surface of the n-drift region to improve current conduction capability during on-state operation. As a result, the...

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Bibliographic Details
Published inJournal of semiconductors Vol. 37; no. 5; pp. 52 - 55
Main Author 杜文芳 吕信江 陈星弼
Format Journal Article
LanguageEnglish
Published 01.05.2016
Subjects
Charge
Current carriers
Devices
Electric charge
Gates
Ionization
LDMOS
Semiconductors
Simulation
SOA
传导能力
器件模拟
多数载流子
安全工作区
比电阻
运行状态
Online AccessGet full text
ISSN1674-4926
DOI10.1088/1674-4926/37/5/054006

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Summary:An LDMOS with nearly rectangular-shape safe operation area （SOA） and low specific on-resistance is proposed. By utilizing a split gate, an electron accumulation layer is formed near the surface of the n-drift region to improve current conduction capability during on-state operation. As a result, the specific on-resistance can be low- ered down to 74.7 m~2.cm2 for a 600 V device from simulation. Furthermore, under high-voltage and high-current conditions, electrons and holes flow as majority carriers in the n-drift region and p-type split gate, respectively. Due to charge compensation occurring between holes and electrons, the local electric field is reduced and impact ion- ization is weakened in the proposed device. Therefore, a higher on-state breakdown voltage at large V6s is obtained and snap-back is suppressed as well.
Bibliography:11-5781/TN
LDMOS; safe operation area （SOA）; snap-back; split gate
An LDMOS with nearly rectangular-shape safe operation area （SOA） and low specific on-resistance is proposed. By utilizing a split gate, an electron accumulation layer is formed near the surface of the n-drift region to improve current conduction capability during on-state operation. As a result, the specific on-resistance can be low- ered down to 74.7 m~2.cm2 for a 600 V device from simulation. Furthermore, under high-voltage and high-current conditions, electrons and holes flow as majority carriers in the n-drift region and p-type split gate, respectively. Due to charge compensation occurring between holes and electrons, the local electric field is reduced and impact ion- ization is weakened in the proposed device. Therefore, a higher on-state breakdown voltage at large V6s is obtained and snap-back is suppressed as well.
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ISSN:1674-4926
DOI:10.1088/1674-4926/37/5/054006