Influence of H2 treatment on the surface morphology of SiC with different wafer orientation and doping

•H2-etched SiC with different wafer orientation and doping are analyzed in detail.•Si-face 4° off-cut wafer boasts obvious terrace step after 1650 °C H2 treatment.•∼ 15 % to ∼ 51 % decrement in roughness is realized in C-face 4° off-cut substrate.•Defective graphitic structure is identified after hi...

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Bibliographic Details
Published inJournal of crystal growth Vol. 607; p. 127105
Main Authors Shen, Zhanwei, Zhang, Feng, Liu, Xingfang, Sun, Guosheng, Zeng, Yiping
Format Journal Article
LanguageEnglish
Published Elsevier B.V 01.04.2023
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Summary:•H2-etched SiC with different wafer orientation and doping are analyzed in detail.•Si-face 4° off-cut wafer boasts obvious terrace step after 1650 °C H2 treatment.•∼ 15 % to ∼ 51 % decrement in roughness is realized in C-face 4° off-cut substrate.•Defective graphitic structure is identified after high temperature Ar treatment. H2 treatment is becoming a valuable method for the in-situ surface preparation of SiC wafer. Then clean interfacial layer can be attained in manufacturing SiC-based devices. However, surface morphology of SiC depends on wafer orientation and doping. Herein, H2-etched SiC wafers comprising various crystal planes were analyzed in detail. Formation of faceted etch pits occurs on C- and Si-faces of on-axis substrates. Meanwhile, Si-face of 4° off-cut substrate and the epitaxial layer boasts obvious terrace step after 1650 °C H2 treatment, indicating the increment of surface roughness. As our study revealed, H2 treatment is beneficial for achieving smoother surface morphology of C-face than Si-face wafers, as well as realizing ∼15 % to ∼51 % decrement in average roughness in C-face 4° off-cut substrate. Furthermore, defective graphitic structure and SiC crystal are identified after high temperature Ar treatment. The use of these results is expected to gain insights into the decomposition behavior of SiC with different wafer orientation and surface doping. Also, it is meaningful to realize the surface preparation process in power- and nano- electronic device fabrications.
ISSN:0022-0248
1873-5002
DOI:10.1016/j.jcrysgro.2023.127105