Characterization of Low Drop-Out during ageing and design for yield

• Published in: Microelectronics and reliability Vol. 76-77; pp. 92 - 96
• Main Authors: Lajmi, R., Cacho, F., Lauga Larroze, E., Bourdel, S., Benech, P., Huard, V., Federspiel, X.
• Format: Journal Article
• Language: English
• Published: Elsevier Ltd 01.09.2017
• ISSN: 0026-2714; 1872-941X
• DOI: 10.1016/j.microrel.2017.07.047

Low Drop-Out (LDO) voltage regulators are extensively used to provide a stable power supply voltage independent of load impedance. LDO must be robust with regard to input voltage, temperature and local mismatch variations. Moreover, it must fulfill these specifications all along its lifetime. The influence of process variation on LDO performances has intensively been studied, but only few works are reported about ageing mechanisms. This paper presents an illustrative case study on the change of LDO performances due to wear-out mechanisms. The ageing effects are investigated on the static and dynamic performances parameters. After introducing LDO design content, a review of degraded performances (Output Voltage VOUT, Power Supply Rejection Ratio (PSRR), shutdown current…) is presented and compared to simulation. Then, statistical VOUT measurements are presented and compared with Monte Carlo simulations. Finally, sizing for yield methodology is introduced. The objective is to find optimal device size to guarantee a target of failure rate in fresh and aged conditions. •Ageing induced by electrical stress has a significant influence on DC and AC performances of LDO.•Measurement results are in accordance with simulation results.•Yield Optimization of influent parameters to design robust IP