A novel superjunction MOSFET with improved ruggedness under unclamped inductive switching

The ruggedness of a superjunction metal-oxide semiconductor field-effect transistor （MOSFET） under unclamped inductive switching conditions is improved by optimizing the avalanche current path. Inserting a P-island with relatively high doping concentration into the P-column, the avalanche breakdown...

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Published inChinese physics B Vol. 21; no. 4; pp. 612 - 618
Main Author 任敏 李泽宏 邓光敏 张灵霞 张蒙 刘小龙 谢加雄 张波
Format Journal Article
LanguageEnglish
Published 01.04.2012
Subjects
Avalanches
Computer simulation
Mathematical models
Metal oxide semiconductors
MOSFET
MOSFETs
Ruggedness
Semiconductors
Switching
Two dimensional
寄生晶体管
感应开关
掺杂浓度
沟槽设计
耐用性
金属氧化物半导体场效应晶体管
钳位
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Summary:The ruggedness of a superjunction metal-oxide semiconductor field-effect transistor （MOSFET） under unclamped inductive switching conditions is improved by optimizing the avalanche current path. Inserting a P-island with relatively high doping concentration into the P-column, the avalanche breakdown point is localized. In addition, a trench type P＋ contact is designed to shorten the current path. As a consequence, the avalanche current path is located away from the N＋ source/P-body junction and the activation of the parasitic transistor can be effectively avoided. To verify the proposed structural mechanism, a two-dimensional （2D） numerical simulation is performed to describe its static and on-state avalanche behaviours, and a method of mixed-mode device and circuit simulation is used to predict its performances under realistic unclanlped inductive switching. Simulation shows that the proposed structure can endure a remarkably higher avalanche energy compared with a conventional superjunction MOSFET.
Bibliography:The ruggedness of a superjunction metal-oxide semiconductor field-effect transistor （MOSFET） under unclamped inductive switching conditions is improved by optimizing the avalanche current path. Inserting a P-island with relatively high doping concentration into the P-column, the avalanche breakdown point is localized. In addition, a trench type P＋ contact is designed to shorten the current path. As a consequence, the avalanche current path is located away from the N＋ source/P-body junction and the activation of the parasitic transistor can be effectively avoided. To verify the proposed structural mechanism, a two-dimensional （2D） numerical simulation is performed to describe its static and on-state avalanche behaviours, and a method of mixed-mode device and circuit simulation is used to predict its performances under realistic unclanlped inductive switching. Simulation shows that the proposed structure can endure a remarkably higher avalanche energy compared with a conventional superjunction MOSFET.
11-5639/O4
Ren Min, Li Ze-Hong, Deng Guang-Min, Zhang Ling-Xia, Zhang Meng, Liu Xiao-Long, Xie Jia-Xiong, and Zhang Bo（State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China）
avalanche current path, unclamped inductive switching, superjunction, MOSFET
ObjectType-Article-1
SourceType-Scholarly Journals-1
ObjectType-Feature-2
content type line 23
ISSN:1674-1056
2058-3834
1741-4199
DOI:10.1088/1674-1056/21/4/048502