Wafer sojourn time fluctuation analysis for time-constrained dual-arm multi-cluster tools with activity time variation

In semiconductor manufacturing systems, a time-constrained multi-cluster tool should be scheduled such that a wafer stays in a process chamber in a given time range to satisfy a wafer residency time constraint. In practice, activity time is subject to variation. It could lead to some fluctuation of...

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Bibliographic Details
Published inInternational journal of computer integrated manufacturing Vol. 34; no. 7-8; pp. 734 - 751
Main Authors Yang, Fajun, Wu, Naiqi, Qiao, Yan, Su, Rong, Zhang, Chunjiang
Format Journal Article
LanguageEnglish
Published Taylor & Francis 03.08.2021
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Summary:In semiconductor manufacturing systems, a time-constrained multi-cluster tool should be scheduled such that a wafer stays in a process chamber in a given time range to satisfy a wafer residency time constraint. In practice, activity time is subject to variation. It could lead to some fluctuation of wafer residency time in a process chamber. Hence, it is crucial to analyze how wafer residency time varies with activity time variation. This issue is especially challenging for multi-cluster tools. This work focuses on determining the exact upper bound of wafer sojourn time delay resulted from activity time variation for dual-arm multi-cluster tools. After discussing their dynamic behaviours, it presents a two-level real-time operational architecture and a real-time control policy. Based on them, this work derives for the first time an efficient algorithm to calculate the exact upper bound of wafer sojourn time delay in a process chamber. As a result, engineers can test whether a given schedule is feasible. Several examples of industrial significance are used to demonstrate the application of the proposed approach.
ISSN:0951-192X
1362-3052
DOI:10.1080/0951192X.2020.1718767