Design methodology for on-chip-based processor debugger

• Published in: Design automation for embedded systems Vol. 19; no. 1-2; pp. 35 - 57
• Main Authors: Park, Hyeongbae, Xu, Jingzhe, Ji, Jeong-Hoon, Park, Jusung, Woo, Gyun
• Format: Journal Article
• Language: English
• Published: New York Springer US 01.03.2015
• Subjects: CAE) and Design; Circuits and Systems; Computer-Aided Engineering (CAD; Engineering; Special Purpose and Application-Based Systems; JTAG; GDB; On-chip debugger; Processor debugger; Source-level functional simulation
• ISSN: 0929-5585; 1572-8080
• DOI: 10.1007/s10617-014-9135-8

Due to the increased complexity of modern embedded systems and time-to-market constraints, a debugger with efficient debugging functions is becoming increasingly necessary, and it plays an important role in the development of application systems. Accordingly, the implementation of efficient debug functionalities must a critical process in the design of a new processor. Since deeply embedded processor cores in a core-based system chip allow only restricted access for debugging its internal status, most recent processors employ the on-chip-based debug method that embeds special logic-supporting debug capabilities. In this paper, we propose an on-chip debug support logic that can be embedded into the processor core to support debug functions. Moreover, we describe an overall implementation method of the on-chip-based processor debugger based on the on-chip debug support logic, which includes a source-level debugger and an interface block. We designed an on-chip debug support logic, and embedded it into a target processor core. We used the GNU Project debugger (GDB) as the source-level debugger of the target processor core. An interface block that uses the remote debugging features of GDB was also developed and that includes a software module and a hardware board. We discuss all major design steps for implementing this on-chip-based processor debugger. We have successfully applied the proposed implementation method to develop the processor debugger for two new 32-bit RISC processors. In addition, we introduce another use of the on-chip-based processor debugger in the design of a processor-based system chip, which can facilitate simulation-based functional verification.