A CMOS SPAD Sensor With a Multi-Event Folded Flash Time-to-Digital Converter for Ultra-Fast Optical Transient Capture

A digital silicon photomultiplier in 130-nm CMOS imaging technology implements time-correlated single photon counting at an order of magnitude beyond the conventional pile-up limit. The sensor comprises a 32 × 32 43% fill-factor single photon avalanche diode array with a multi-event folded-flash tim...

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Bibliographic Details
Published inIEEE sensors journal Vol. 18; no. 8; pp. 3163 - 3173
Main Authors Al Abbas, Tarek, Dutton, Neale A. W., Almer, Oscar, Finlayson, Neil, Della Rocca, Francescopaolo Mattioli, Henderson, Robert
Format Journal Article
LanguageEnglish
Published IEEE 15.04.2018
Subjects
CMOS
Delay lines
Delays
Flip-flops
Logic gates
optical sensor
Optical sensors
Photonics
silicon photomultiplier
single photon avalanche diode
Time to digital converter
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Summary:A digital silicon photomultiplier in 130-nm CMOS imaging technology implements time-correlated single photon counting at an order of magnitude beyond the conventional pile-up limit. The sensor comprises a 32 × 32 43% fill-factor single photon avalanche diode array with a multi-event folded-flash time-to-digital converter architecture operating at 10 GS/s. 264 bins × 16 bit histograms are generated and read out from the chip at a maximal 188 kHz enabling fast time resolved scanning or ultrafast low-light event capture. Full optical and electrical characterization results are presented.
ISSN:1530-437X
1558-1748
DOI:10.1109/JSEN.2018.2803087