Submicron p-channel (Al,Ga)As/(In,Ga)As HIGFETs

• Published in: IEEE transactions on electron devices Vol. 44; no. 7; pp. 1040 - 1045
• Main Authors: Abrokwah, J.K., Lucero, R., Hallmark, J.A., Bernhardt, B.
• Format: Journal Article
• Language: English
• Published: IEEE 01.07.1997
• Subjects: Circuits; Conductivity; Contamination; FETs; Gallium arsenide; Implants; Impurities; Insulation; Subthreshold current; Threshold voltage
• ISSN: 0018-9383; 1557-9646
• DOI: 10.1109/16.595929

Submicron p-channel (Al,Ga)As/(In,Ga)As HIGFETs have been optimized for application to high-performance complementary GaAs circuits. Major issues with submicron and deep submicron (L/sub g//spl les/0.5-/spl mu/m) P-channel HIGFETs have been the severe short-channel effects, such as high subthreshold leakage currents and high output conductances. With optimization of the p-type self-aligned implant schedule, control of impurity contamination at the substrate/buffer interfaces and increase of the resistivity of the unintentionally-doped GaAs buffers, high-performance submicron devices have been realized. Typically, 0.5-/spl mu/m P-HIGFETs yielded room temperature transconductances of 90 mS/mm, drain currents at V/sub gs/=V/sub ds/=-1.5 V of 63 mA/mm, and subthreshold leakage currents near 1 nA. Subthreshold slope of 90 mV/decade and output conductances under 5 mS/mm were realized.