ePlace-MS: Electrostatics-Based Placement for Mixed-Size Circuits

• Published in: IEEE transactions on computer-aided design of integrated circuits and systems Vol. 34; no. 5; pp. 685 - 698
• Main Authors: Jingwei Lu, Hao Zhuang, Pengwen Chen, Hongliang Chang, Chin-Chih Chang, Yiu-Chung Wong, Lu Sha, Huang, Dennis, Yufeng Luo, Chin-Chi Teng, Chung-Kuan Cheng
• Format: Journal Article
• Language: English
• Published: IEEE 01.05.2015
• Subjects: Analytic placement; Density functional theory; Electric potential; electrostatic analogy; Electrostatics; fast Fourier transform; Force; Lipschitz constant; Nesterov's method; nonlinear optimization; Optimization; Poisson's equation; Potential energy; preconditioning; spectral methods; poisson’s equation; spectral methods; electrostatic analogy; Analytic placement; Nesterov’s method; Lipschitz constant; fast Fourier transform (FFT); nonlinear optimization; preconditioning
• ISSN: 0278-0070; 1937-4151
• DOI: 10.1109/TCAD.2015.2391263

We propose an electrostatics-based placement algorithm for large-scale mixed-size circuits (ePlace-MS). ePlace-MS is generalized, flat, analytic and nonlinear. The density modeling method eDensity is extended to handle the mixed-size placement. We conduct detailed analysis on the correctness of the gradient formulation and the numerical solution, as well as the rationale of dc removal and the advantages over prior density functions. Nesterov's method is used as the nonlinear solver, which shows high yet stable performance over mixed-size circuits. The steplength is set as the inverse of Lipschitz constant of the gradient function, while we develop a backtracking method to prevent overestimation. An approximated nonlinear preconditioner is developed to minimize the topological and physical differences between large macros and standard cells. Besides, we devise a simulated annealer to legalize the layout of macros and use a second-phase global placement to reoptimize the standard cell layout. All the above innovations are integrated into our mixed-size placement prototype ePlace-MS, which outperforms all the related works in literature with better quality and efficiency. Compared to the leading-edge mixed-size placer NTUplace3, ePlace-MS produces up to 22.98% and on average 8.22% shorter wirelength over all the 16 modern mixed-size benchmark circuits with the same runtime.