Performance analysis of a single-server ATM queue with a priority scheduling

• Published in: Computers & operations research Vol. 30; no. 12; pp. 1807 - 1829
• Main Authors: Walraevens, Joris, Steyaert, Bart, Bruneel, Herwig
• Format: Journal Article
• Language: English
• Published: Elsevier Ltd 01.10.2003
• Subjects: ATM switch; Discrete-time queueing models; Priority scheduling; ATM switch; Priority scheduling; Discrete-time queueing models
• ISSN: 0305-0548; 1873-765X
• DOI: 10.1016/S0305-0548(02)00108-9

In this paper, we consider a discrete-time queueing system with head-of-line priority. First, we will give some general results on a GI-1-1 queue with priority scheduling. In particular, we will derive expressions for the probability generating function of the system contents and the cell delay. Some performance measures (such as mean, variance and approximate tail distributions) of these quantities will be derived, and used to illustrate the impact and significance of priority scheduling in an ATM output queueing switch. Scope and purpose Queueing theory is an important subject in computers and operations research. Buffers/queues are used, e.g., in telecommunication networks, to store information that cannot be transmitted instantaneously. The study of the buffer behavior is important since network performance is directly related to it. Queues with a priority scheduling discipline are an important subject in queueing theory. As a result, these type of queues are thoroughly studied in the past, especially in continuous time. In discrete-time queueing models on the other hand, this type of queues is not as widely studied. Discrete-time queueing models are suitable for the performance evaluation of asynchronous transfer mode (ATM) switches. In ATM, different types of traffic need different quality of service (QoS) standards. The delay characteristics of delay-sensitive traffic (e.g., voice) are more stringent than those of delay-insensitive traffic (e.g., data). We can thus give priority to delay-sensitive traffic over delay-insensitive traffic, thus trying to reduce the delay of the delay-sensitive traffic. This paper studies the impact of a priority scheduling on the buffer characteristics.