Front-end module readout and control electronics for the PHENIX Multiplicity Vertex Detector

Front-end module (FEM) readout and control are implemented as modular, high-density, reprogrammable functions in the PHENIX Multiplicity Vertex Detector. FEM control is performed by the heap manager, an FPGA-based circuit in the FEM unit. Each FEM has 256 channels of front-end electronics, readout,...

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Bibliographic Details
Published inIEEE transactions on nuclear science Vol. 45; no. 3; pp. 833 - 837
Main Authors Ericson, M.N., Allen, M.D., Boissevain, J., Britton, C.L., Emery, M.S., Hahn, S.F., Kapustinsky, J.S., Lind, R.E., Musrock, M.S., Simon-Gillo, J., Smith, D.E., Sullivan, J.P., Van Hecke, H., Young, G.R., Smith, M.C.
Format Journal Article
LanguageEnglish
Published IEEE 01.06.1998
Subjects
Circuits
Communication system control
Detectors
Error correction
Field programmable gate arrays
Functional programming
Laboratories
Silicon
Strips
Timing
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Summary:Front-end module (FEM) readout and control are implemented as modular, high-density, reprogrammable functions in the PHENIX Multiplicity Vertex Detector. FEM control is performed by the heap manager, an FPGA-based circuit in the FEM unit. Each FEM has 256 channels of front-end electronics, readout, and control, all located on an MCM. Data readout, formatting, and control are performed by the heap manager along with 4 interface units that reside outside the MVD detector cylinder. This paper discusses the application of a generic heap manager and the addition of 4 interface module types to meet the specific control and data readout needs of the MVD. Unit functioning, interfaces, timing, data format, and communication rates will be discussed in detail. In addition, subsystem issues regarding mode control, serial architecture and functions, error handling, and FPGA implementation and programming will be presented.
ISSN:0018-9499
1558-1578
DOI:10.1109/23.682646