A monolithic transformer coupled 5-W silicon power amplifier with 59% PAE at 0.9 GHz
This paper presents the circuit design and application of a monolithically integrated silicon radio-frequency power amplifier for 0.8-1 GHz. The chip is fabricated in a 25-GHz-f/sub T/ silicon bipolar production technology (Siemens B6HF). A maximum output power of 5 W and maximum efficiency of 59% i...
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Published in | IEEE journal of solid-state circuits Vol. 34; no. 12; pp. 1881 - 1892 |
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Main Authors | , , , |
Format | Journal Article |
Language | English |
Published |
IEEE
01.12.1999
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Subjects | |
Online Access | Get full text |
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Summary: | This paper presents the circuit design and application of a monolithically integrated silicon radio-frequency power amplifier for 0.8-1 GHz. The chip is fabricated in a 25-GHz-f/sub T/ silicon bipolar production technology (Siemens B6HF). A maximum output power of 5 W and maximum efficiency of 59% is achieved. The chip is operating from 2.5 to 4.5 V. The linear gain is 36 dB. The balanced two-stage circuit design is based fundamentally on three on-chip transformers. The driver stage and the output stage are connected in common-emitter configuration. The input signal can be applied balanced or single-ended if one input terminal is grounded. One transformer at the input acts as balun as well as input matching network. Two transformers acts as interstage matching network. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 0018-9200 1558-173X |
DOI: | 10.1109/4.808913 |