A monolithic transformer coupled 5-W silicon power amplifier with 59% PAE at 0.9 GHz

This paper presents the circuit design and application of a monolithically integrated silicon radio-frequency power amplifier for 0.8-1 GHz. The chip is fabricated in a 25-GHz-f/sub T/ silicon bipolar production technology (Siemens B6HF). A maximum output power of 5 W and maximum efficiency of 59% i...

Full description

Saved in:
Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 34; no. 12; pp. 1881 - 1892
Main Authors Simburger, W., Wohlmuth, H.-D., Weger, P., Heinz, A.
Format Journal Article
LanguageEnglish
Published IEEE 01.12.1999
Subjects
Balancing
Baluns
Chips
Circuit design
Circuit synthesis
Coupling circuits
Impedance matching
Integrated circuit technology
Matching
Networks
Power amplifiers
Power generation
Production
Radio frequency
Radiofrequency amplifiers
Silicon
Transformers
Online AccessGet full text

Cover

More Information
Summary:This paper presents the circuit design and application of a monolithically integrated silicon radio-frequency power amplifier for 0.8-1 GHz. The chip is fabricated in a 25-GHz-f/sub T/ silicon bipolar production technology (Siemens B6HF). A maximum output power of 5 W and maximum efficiency of 59% is achieved. The chip is operating from 2.5 to 4.5 V. The linear gain is 36 dB. The balanced two-stage circuit design is based fundamentally on three on-chip transformers. The driver stage and the output stage are connected in common-emitter configuration. The input signal can be applied balanced or single-ended if one input terminal is grounded. One transformer at the input acts as balun as well as input matching network. Two transformers acts as interstage matching network.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9200
1558-173X
DOI:10.1109/4.808913