A 0.5-V MTCMOS/SIMOX logic gate

This paper proposes a multithreshold CMOS (MTCMOS) circuit that uses SIMOX process technology. This MTCMOS/SIMOX circuit combines fully depleted low-threshold CMOS logic gates and partially depleted high-threshold power-switch transistors. The low-threshold CMOS gates have a large noise margin for f...

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Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 32; no. 10; pp. 1604 - 1609
Main Authors Douseki, T., Shigematsu, S., Yamada, J., Harada, M., Inokawa, H., Tsuchiya, T.
Format Journal Article
LanguageEnglish
Published IEEE 01.10.1997
Subjects
Active noise reduction
Circuit noise
Circuit testing
CMOS logic circuits
CMOS process
CMOS technology
Fluctuations
Logic gates
Low voltage
Temperature
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Summary:This paper proposes a multithreshold CMOS (MTCMOS) circuit that uses SIMOX process technology. This MTCMOS/SIMOX circuit combines fully depleted low-threshold CMOS logic gates and partially depleted high-threshold power-switch transistors. The low-threshold CMOS gates have a large noise margin for fluctuations in operating temperature in addition to high-speed operation at the low supply voltage of 0.5 V. The high-threshold power-switch transistor in which the body is connected to the gate through the reverse-diode makes it possible to obtain large channel conductance in the active mode without any increase of the leakage current in the sleep mode. The effectiveness of the MTCMOS/SIMOX circuit is confirmed by an evaluation of a gate-chain test element group (TEG) and an experimental 0.5-V, 40-MHz, 16-b ALU, which were designed and fabricated with 0.25-/spl mu/m MTCMOS/SIMOX technology.
Bibliography:ObjectType-Article-2
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content type line 23
ISSN:0018-9200
1558-173X
DOI:10.1109/4.634672