A scalable scheduling scheme for functional parallelism on distributed memory multiprocessor systems

We attempt a new variant of the scheduling problem by investigating the scalability of the schedule length with the required number of processors, by performing scheduling partially at compile time and partially at run time. Assuming infinite number of processors, the compile time schedule is found...

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Bibliographic Details
Published inIEEE transactions on parallel and distributed systems Vol. 6; no. 4; pp. 388 - 399
Main Authors Pande, S., Agrawal, D.P., Mauney, J.
Format Journal Article
LanguageEnglish
Published Los Alamitos, CA IEEE 01.04.1995
IEEE Computer Society
Subjects
Applied sciences
Computer science; control theory; systems
Computer systems and distributed systems. User interface
Costs
Delay effects
Dynamic scheduling
Exact sciences and technology
Multiprocessing systems
Optimal scheduling
Parallel processing
Processor scheduling
Runtime
Scalability
Scheduling algorithm
Software
Software engineering
Multiprocessor
Distributed memory multiprocessor system
Graph
Parallelism
Scheduling
Distributed system
Data flow
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Summary:We attempt a new variant of the scheduling problem by investigating the scalability of the schedule length with the required number of processors, by performing scheduling partially at compile time and partially at run time. Assuming infinite number of processors, the compile time schedule is found using a new concept of the threshold of a task that quantifies a trade-off between the schedule-length and the degree of parallelism. The schedule is found to minimize either the schedule length or the number of required processors and it satisfies: A feasibility condition which guarantees that the schedule delay of a task from its earliest start time is below the threshold, and an optimality condition which uses a merit function to decide the best task-processor match for a set of tasks competing for a given processor. At run time, the tasks are merged producing a schedule for a smaller number of available processors. This allows the program to be scaled down to the processors actually available at run time. Usefulness of this scheduling heuristic has been demonstrated by incorporating the scheduler in the compiler backend for targeting Sisal (Streams and Iterations in a Single Assignment Language) on iPSC/860.< >
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
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ISSN:1045-9219
1558-2183
DOI:10.1109/71.372792