A Hardware Accelerate Simulator for Network Processor Based on FPGA

With the dramatically increase of the scale of the Network Processor, traditionally verification method can't satisfied the requirement of market due to the limitation of the simulate speed. For solving the verification problems, a novel hardware accelerate simulator for Network Processor based...

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Bibliographic Details
Published inApplied Mechanics and Materials Vol. 130-134; pp. 3006 - 3009
Main Authors Di, Zhi Xiong, Pang, Jie, Shi, Jiang Yi, Li, Kang, Hao, Yue, Ma, Pei Jun
Format Journal Article
LanguageEnglish
Published Zurich Trans Tech Publications Ltd 01.01.2012
Subjects
Hardware Accelerate
Network Processor
Verification
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Summary:With the dramatically increase of the scale of the Network Processor, traditionally verification method can't satisfied the requirement of market due to the limitation of the simulate speed. For solving the verification problems, a novel hardware accelerate simulator for Network Processor based on FPGA is proposed. This simulator improves the simulate speed remarkably. Furthermore, the probed signals of the Network Processor can be dumped into wave file real-timely.
Bibliography:Selected, peer reviewed papers from the 2011 3rd International Conference on Mechanical and Electronics Engineering (ICMEE 2011), September 23-25, 2011, Hefei, China
ISBN:3037852860
9783037852866
ISSN:1660-9336
1662-7482
1662-7482
DOI:10.4028/www.scientific.net/AMM.130-134.3006