CMOS translinear circuits for minimum supply voltage
Three basic translinear circuit topologies are modified for use at low supply voltage. They are: (1) the balanced translinear loop; (2) the alternating translinear loop; and (3) the instantaneous-companding integrator. The key to this work is the constructive use of nonsaturated MOS transistors oper...
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Published in | IEEE transactions on circuits and systems. 2, Analog and digital signal processing Vol. 47; no. 12; pp. 1560 - 1564 |
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Main Authors | , , , , |
Format | Journal Article |
Language | English |
Published |
New York
IEEE
01.12.2000
The Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subjects | |
Online Access | Get full text |
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Summary: | Three basic translinear circuit topologies are modified for use at low supply voltage. They are: (1) the balanced translinear loop; (2) the alternating translinear loop; and (3) the instantaneous-companding integrator. The key to this work is the constructive use of nonsaturated MOS transistors operating in weak inversion. This provides two improvements. First, circuit operation is extended to low supply voltage. Second, accurate realization is enabled since the circuits become immune to MOS body-effect. The proposed techniques are suitable for static and dynamic analog signal processing circuits in mixed-signal chips fabricated in digital CMOS technology and operating at the minimum possible supply voltage. |
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Bibliography: | ObjectType-Article-2 SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 23 |
ISSN: | 1057-7130 1558-125X |
DOI: | 10.1109/82.899656 |