A Memory Reliability Enhancement Technique for Multi Bit Upsets

Technological advances allow the production of increasingly complex electronic systems. Nevertheless, technology and voltage scaling increased dramatically the susceptibility of new devices not only to Single Bit Upsets (SBU), but also to Multiple Bit Upsets (MBU). In safety critical applications, i...

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Bibliographic Details
Published inJournal of signal processing systems Vol. 93; no. 4; pp. 439 - 459
Main Authors Chabot, Alexandre, Alouani, Ihsen, Nouacer, Réda, Niar, Smail
Format Journal Article
LanguageEnglish
Published New York Springer US 01.04.2021
Springer Nature B.V
Springer
Subjects
Artificial Intelligence
Circuits and Systems
Computer Imaging
Computer Science
Electrical Engineering
Electronic systems
Electronics
Engineering
Engineering Sciences
Fault tolerance
Image Processing and Computer Vision
Networking and Internet Architecture
Pattern Recognition
Pattern Recognition and Graphics
Redundancy
Safety critical
Signal and Image processing
Signal,Image and Speech Processing
Vision
MBU
Reliability
Fault injection
Memory
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Summary:Technological advances allow the production of increasingly complex electronic systems. Nevertheless, technology and voltage scaling increased dramatically the susceptibility of new devices not only to Single Bit Upsets (SBU), but also to Multiple Bit Upsets (MBU). In safety critical applications, it is mandatory to provide fault-tolerant systems, providing high reliability while meeting applications requirements. The problem of reliability is particularly expressed within the memory which represents more than 80 % of systems on chips. To tackle this problem we propose a new memory reliability techniques referred to as DPSR: Double Parity Single Redundancy. DPSR is designed to enhance computing systems resilience to SBU and MBU. Based on a thorough fault injection experiments, DPSR shows promising results; It detects and corrects more than 99.6 % of encountered MBU and has an average time overhead of less than 3 %.
ISSN:1939-8018
1939-8115
DOI:10.1007/s11265-020-01603-5