A 5-V-only 16-Mb flash memory with sector erase mode

• Published in: IEEE journal of solid-state circuits Vol. 27; no. 11; pp. 1547 - 1554
• Main Authors: Jinbo, T., Nakata, H., Hashimoto, K., Watanabe, T., Ninomiya, K., Urai, T., Koike, M., Sato, T., Kodama, N., Oyama, K., Okazawa, T.
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.11.1992; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Circuits; CMOS process; CMOS technology; Decoding; Electronics; Exact sciences and technology; Flash memory; Integrated circuits; Integrated circuits by function (including memories and processors); Lithography; MOS devices; National electric code; Semiconductor electronics. Microelectronics. Optoelectronics. Solid state devices; Tungsten; Voltage; Waveform; Operation study; Microelectronic fabrication; Electric scheme; Complementary MOS technology; Flash memory; Memory capacity; Electrical characteristic
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/4.165335

A 5-V-only 16-Mb CMOS flash memory with sector erase mode is described. An optimized memory cell with diffusion self-aligned drain structure and channel erase are keys to achieving 5-V-only operation. By adopting this erase method and row decoders to apply negative bias, 512-word sector erase can be realized. The auto chip erase time of 4 s has been achieved by adopting 64-b simultaneous operation and improved erase sequence. The cell size is 1.7 mu m*2.0 mu m and the chip size is 6.3 mm*18.5 mm using 0.6- mu m double-layer metal triple-well CMOS technology.< >