Comparison of DEM and BEET Linearization Techniques for Flash Analog-to-Digital Converters
Data converter linearization has been a subject of some interest for most of the past decade. New methods of linearizing analog-to-digital converters (ADCs) continue to be developed. Various linearization methods are available but their comparative strengths and weaknesses are not easily recognizabl...
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Published in | Circuits, systems, and signal processing Vol. 32; no. 6; pp. 2639 - 2652 |
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Main Authors | , , |
Format | Journal Article |
Language | English |
Published |
Boston
Springer US
01.12.2013
Springer Nature B.V |
Subjects | |
Online Access | Get full text |
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Summary: | Data converter linearization has been a subject of some interest for most of the past decade. New methods of linearizing analog-to-digital converters (ADCs) continue to be developed. Various linearization methods are available but their comparative strengths and weaknesses are not easily recognizable, making it somewhat difficult to determine which compensator would provide maximum benefit for a specific device. This paper provides a novel performance comparison of two promising real-time linearization methods for flash ADCs: the in-device DEM method, and the peripherally-implemented BEET method using SFDR, SINAD, ENOB, and THD as performance metrics. It is found that BEET is the superior compensator for devices with INL values larger than 0.25 LSB and DNL values larger than 0.25 LSB for optimal SFDR. Results from SINAD, ENOB, and THD metrics indicate that BEET is superior compared to DEM for all devices that have INL>0.05 LSB. |
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Bibliography: | SourceType-Scholarly Journals-1 ObjectType-Feature-1 content type line 14 ObjectType-Article-2 content type line 23 |
ISSN: | 0278-081X 1531-5878 |
DOI: | 10.1007/s00034-013-9603-6 |