Comparative Evaluation of a Full- and Partial-Power Processing Active Power Buffer for Ultracompact Single-Phase DC/AC Converter Systems

• Published in: IEEE journal of emerging and selected topics in power electronics Vol. 9; no. 2; pp. 1994 - 2013
• Main Authors: Neumayr, Dominik, Knabben, Gustavo Carlos, Varescon, Elise, Bortis, Dominik, Kolar, Johann W.
• Format: Journal Article
• Language: English
• Published: Piscataway IEEE 01.04.2021; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Active power decoupling; Buffers; Capacitance; Capacitors; Density measurement; Electric converters; Electric potential; Electrolytic capacitors; Energy conversion efficiency; Energy storage; Google; Google Little Box Challenge (LBC); Inverters; partial-power converter; power pulsation buffer; Power system measurements; Ripples; series voltage injector (SVI); Voltage
• ISSN: 2168-6777; 2168-6785
• DOI: 10.1109/JESTPE.2020.2987937

One of the key technical challenges of the Google and IEEE Little Box competition, an international contest to build the world's smallest 2-kW single-phase inverter in 2015, was to shrink the volume of the energy storage required to cope with the twice mains-frequency (120 Hz) pulsating power at the ac side and meet the stringent 2.5% input voltage ripple at the dc side. In this article, first, a full-power processing buck-type converter active buffer approach, selected by the first prize winner of the Little Box Challenge (LBC), is analyzed in detail. Being relieved from strict voltage ripple requirements, a larger voltage ripple is allowed across the buffer capacitor significantly reducing the capacitance requirement. Second, a partial-power active buffer approach, selected by the second prize winner of the LBC, where conventional passive capacitive buffering of the dc-link is combined with a series-connected auxiliary converter, used to compensate for the remaining 120-Hz voltage ripple across the dc-link capacitance, is studied in detail. In this article, both the selected concepts are comparatively evaluated in terms of achievable efficiency, power density, and ripple compensation performance under both stationary and transient conditions. Novel control schemes and optimally designed hardware prototypes for both considered buffer concepts are presented and accompanied by experimental measurements to support the claimed efficiency and power density and assess the performance of the implemented control systems. Finally, by means of comparison with conventional passive dc-link buffering using only electrolytic capacitors, it is determined at what voltage ripple requirement it actually becomes beneficial in terms of volume to employ the considered active buffer concepts.