A 0.8-V Supply, 1.58% 3σ-Accuracy, 1.9-μW Bandgap Reference in 0.13-μm CMOS

• Published in: IEEE transactions on circuits and systems. II, Express briefs Vol. 71; no. 4; pp. 1884 - 1888
• Main Authors: Cao, Yirui, Zhuang, Haoyu, Li, Qiang
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.04.2024; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Accuracy; Amplifiers; automatic current-controlled feedback loop; Bandgap reference; CMOS; Control theory; Current mirrors; Energy gap; Error reduction; Feedback loop; Feedback loops; high accuracy; low power; Low voltage; Photonic band gap; Power consumption; Power demand; Transistors; Voltage
• ISSN: 1549-7747; 1558-3791
• DOI: 10.1109/TCSII.2023.3339236

This brief presents a low-voltage high <inline-formula> <tex-math notation="LaTeX">3\sigma </tex-math></inline-formula>-accuracy bandgap reference (BGR) circuit, which greatly reduces the area and power consumption. Its key highlight is the in-sensitivity to the input-referred offset of the error amplifier. This is advantageous compared to the prior work with high <inline-formula> <tex-math notation="LaTeX">3\sigma </tex-math></inline-formula>-accuracy. In the prior work, the offset of error amplifier affects not only the PTAT current but also the CTAT current. This makes it necessary to greatly reduce the offset of error amplifier, leading to a huge area and power consumption. By contrast, this work proposes a new automatic current-controlled feedback loop, which greatly reduces the influence of the error amplifier offset on the BGR accuracy. As a result, the error amplifier no longer needs to consume large area or power in order to reduce its offset. This effectively reduces the area and power of the entire BGR circuit. For a fair comparison, both the prior work and this work are designed under the same <inline-formula> <tex-math notation="LaTeX">0.13~\mu \text{m} </tex-math></inline-formula> CMOS process. Post-layout simulation results show that the power of the error amplifier is reduced by about 9 times when compared to the prior work. Furthermore, the total power of the proposed BGR circuit is also reduced by 2.5 times than the prior work.