A 35-Gb/s 0.65-pJ/b Asymmetric Push-Pull Inverter-Based VCSEL Driver With Series Inductive Peaking in 65-nm CMOS

• Published in: IEEE transactions on circuits and systems. II, Express briefs Vol. 65; no. 12; pp. 1824 - 1828
• Main Authors: Choi, Hong-Seok, Hwang, Jeongho, Jeong, Gyu-Seob, Kim, Gyungock, Jeong, Deog-Kyoon
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.12.2018; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: anode driving; asymmetric push-pull driver; Bandwidth; Capacitance; Cascode transistors; CMOS; Inverters; Modulation; Power demand; Power efficiency; Semiconductor devices; series inductive peaking; Single-ended; Topology; Transistors; Vertical cavity surface emission lasers; Vertical cavity surface emitting lasers; vertical-cavity surface-emitting laser (VCSEL) driver
• ISSN: 1549-7747; 1558-3791
• DOI: 10.1109/TCSII.2018.2870181

This brief presents a single-ended asymmetric push-pull inverter for driving a vertical-cavity surface-emitting laser (VCSEL). The proposed driver topology features less power dissipation compared with commonly used differential CML-based drivers. Considering power efficiency and the bandwidth of the VCSEL, the modulation current and the bias of the VCSEL are set to 1.5 and 6.2 mA, respectively. Diode-connected cascode transistors are employed to ensure the adequate voltage level at the output node. Series inductive peaking is utilized to extend the limited bandwidth by splitting the load capacitance and the driver self-capacitance. The proposed VCSEL driver has been fabricated in 65-nm CMOS technology and occupies an active area of 0.009 mm 2 . The extinction ratio and the optical modulation amplitude of the driver are measured to be 1.8 dB and 0 dBm at 35 Gb/s. The chip consumes 22.6 mW at the data rate of 35 Gb/s, which corresponds to the energy efficiency of 0.65 pJ/b.