Digital Buck Converter With Switching Loss Reduction Scheme for Light Load Efficiency Enhancement

• Published in: IEEE transactions on very large scale integration (VLSI) systems Vol. 25; no. 2; pp. 783 - 787
• Main Authors: Wu, Chung-Shiang, Lee, Hui-Hsuan, Chen, Po-Hung, Hwang, Wei
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.02.2017; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Appliance industry; Buck converters; Circuits; Controller voltage scaling; Conversion; Delays; digital buck converter; Efficiency; Electric potential; Inductors; Loss reduction; Power generation; Power transistors; power-stage voltage swing scaling; Scaling; Switching; Switching loss; switching loss reduction; Transistors; Voltage control
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/TVLSI.2016.2592537

In this brief, we present a digital pulsewidth modulation buck converter with a switching loss reduction scheme to improve conversion efficiency at light load conditions. The proposed switching loss reduction scheme combines power-stage voltage swing scaling, transistor width scaling, and controller voltage scaling to reduce the dynamic power dissipation of the system. The power-stage voltage swing scaling also reduces the inductor current ripple at light load conditions, which extends the available output current range in the continuous conduction mode (CCM). A duty ratio estimation mechanism is implemented to provide a modulated signal with the correct duty ratio to control the output voltage. Experimental results demonstrate a 38% conversion efficiency improvement at a 50-μA output current. In addition, the proposed circuit achieves a 96% peak efficiency with an output current ranging from 20 μA to 30 mA in the CCM operation.