Voltage Comparator With 60% Faster Speed by Using Charge Pump

This brief proposes a novel comparator to greatly increase its comparison speed while not degrading its noise performance. This comparator is well suited for high-speed high-resolution SAR ADCs. Its structure is based on the classic Miyahara's two-stage comparator with the addition of only an e...

Full description

Saved in:
Bibliographic Details
Published inIEEE transactions on circuits and systems. II, Express briefs Vol. 67; no. 12; pp. 2923 - 2927
Main Authors Zhuang, Haoyu, Tang, He, Liu, Xiaoxian
Format Journal Article
LanguageEnglish
Published New York IEEE 01.12.2020
The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects
Charge pumps
CMOS
Comparator
Electronics packaging
high-speed
Logic gates
low-noise
MOSFET
Noise
Performance degradation
Regeneration
Transconductance
Online AccessGet full text

Cover

More Information
Summary:This brief proposes a novel comparator to greatly increase its comparison speed while not degrading its noise performance. This comparator is well suited for high-speed high-resolution SAR ADCs. Its structure is based on the classic Miyahara's two-stage comparator with the addition of only an extra charge pump. This simple modification greatly accelerates both the second-stage amplification phase and the regeneration phase, leading to significantly increased comparison speed. Meanwhile, the noise performance is not degraded, because the input pair transconductance of the second stage is increased while its integration time is decreased. For fair comparison, both the proposed comparator and the classic Miyahara's comparator are implemented in the same 40nm CMOS process. Measurement results show that the proposed comparator speed is faster by 60% compared with the classic Miyahara's comparator, while the input-referred noise is similar.
ISSN:1549-7747
1558-3791
DOI:10.1109/TCSII.2020.2983928