Germanium surface passivation and atomic layer deposition of high-k dielectrics-a tutorial review on Ge-based MOS capacitors

• Published in: Semiconductor science and technology Vol. 27; no. 7; pp. 74012 - 74025
• Main Authors: Xie, Qi, Deng, Shaoren, Schaekers, Marc, Lin, Dennis, Caymax, Matty, Delabie, Annelies, Qu, Xin-Ping, Jiang, Yu-Long, Deduytsche, Davy, Detavernier, Christophe
• Format: Journal Article
• Language: English
• Published: IOP Publishing 01.07.2012
• Subjects: atomic layer deposition; Germanium; passivation
• ISSN: 0268-1242; 1361-6641
• DOI: 10.1088/0268-1242/27/7/074012

Due to its high intrinsic mobility, germanium (Ge) is a promising candidate as a channel material (offering a mobility gain of approximately ×2 for electrons and ×4 for holes when compared to conventional Si channels). However, many issues still need to be addressed before Ge can be implemented in high-performance field-effect-transistor (FET) devices. One of the key issues is to provide a high-quality interfacial layer, which does not lead to substantial drive current degradation in both low equivalent oxide thickness and short channel regime. In recent years, a wide range of materials and processes have been investigated to obtain proper interfacial properties, including different methods for Ge surface passivation, various high-k dielectrics and metal gate materials and deposition methods, and different post-deposition annealing treatments. It is observed that each process step can significantly affect the overall metal-oxide-semiconductor (MOS)-FET device performance. In this review, we describe and compare combinations of the most commonly used Ge surface passivation methods (e.g. epi-Si passivation, surface oxidation and/or nitridation, and S-passivation) with various high-k dielectrics. In particular, plasma-based processes for surface passivation in combination with plasma-enhanced atomic layer deposition for high-k depositions are shown to result in high-quality MOS structures. To further improve properties, the gate stack can be annealed after deposition. The effects of annealing temperature and ambient on the electrical properties of the MOS structure are also discussed.