An Energy Efficient Computing-in-Memory Accelerator With 1T2R Cell and Fully Analog Processing for Edge AI Applications

• Published in: IEEE transactions on circuits and systems. II, Express briefs Vol. 68; no. 8; pp. 2932 - 2936
• Main Authors: Zhou, Keji, Zhao, Chenyang, Fang, Jinbei, Jiang, Jingwen, Chen, Deyang, Huang, Yujie, Jing, Minge, Han, Jun, Tian, Haidong, Xiong, Xiankui, Liu, Qi, Xue, Xiaoyong, Zeng, Xiaoyang
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.08.2021; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: 1T2R; Artificial neural networks; Clamps; computing-in-memory (CIM); Current mirrors; Energy efficiency; machine learning (ML); neural network (NN); Neurons; ReRAM; Training; Voltage measurement
• ISSN: 1549-7747; 1558-3791
• DOI: 10.1109/TCSII.2021.3065697

In this work, a ReRAM-based energy-efficient CIM accelerator is presented with two techniques for edge AI applications. Firstly, a circuit-algorithm co-design scheme is proposed to realize fully analog processing, which improves the energy efficiency and the throughput of neural network. To deal with the I-V nonlinearity of ReRAM, a nonlinear-aware training algorithm is proposed to improve the network accuracy. Secondly, a 1T2R cell is proposed to replace previous 2T2R for weight storage with 35% area saving. For evaluation, a neural network with two fully connected layers and one ReLU layer is built for the MNIST dataset. The error rate can be reduced by >46% and the energy efficiency is 99 TOPS/W@200 MHz, 2.6X improvement over the digital method.