A DNN-Based Low Power ECG Co-Processor Architecture to Classify Cardiac Arrhythmia for Wearable Devices

• Published in: IEEE transactions on circuits and systems. II, Express briefs Vol. 69; no. 4; pp. 2281 - 2285
• Main Authors: Janveja, Meenali, Parmar, Rushik, Tantuway, Mayank, Trivedi, Gaurav
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.04.2022; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Algorithms; Arrhythmia; Artificial neural networks; ASIC; Biomedical monitoring; Cardiac arrhythmia; Classification; Classifiers; Design optimization; DNN; ECG; Electrocardiography; Feature extraction; Hardware; low power; Microprocessors; Neurons; Power demand; Power management; Wearable computers; Wearable technology

In this brief, a Deep Neural Network (DNN) based cardiac arrhythmia (CA) classifier is proposed, which can classify ECG beats into normal and different types of arrhythmia beats. An optimized fixed length beat is extracted from a time domain ECG signal and is fed as an input to the proposed classifi...