A 2.4-GHz Subharmonically Injection-Locked PLL With Self-Calibrated Injection Timing

• Published in: IEEE journal of solid-state circuits Vol. 48; no. 2; pp. 417 - 428
• Main Authors: HUANG, Yi-Chieh, LIU, Shen-Iuan
• Format: Journal Article
• Language: English
• Published: New York, NY IEEE 01.02.2013; Institute of Electrical and Electronics Engineers
• Subjects: Applied sciences; Circuit properties; Circuits of signal characteristics conditioning (including delay circuits); Clocks; Electric, optical and optoelectronic circuits; Electronic circuits; Electronics; Exact sciences and technology; Integrated circuit modeling; Low jitter; Phase locked loops; Phase noise; phase-locked loop (PLL); subharmonically injection-locked PLL (SILPLL); Timing; Transfer functions; Voltage-controlled oscillators; Phase noise; Performance evaluation; Low-jitter circuit; Selfcalibration; Low jitter; Electric power consumption; Jitter; subharmonically injection-locked PLL (SILPLL); Calibration; Root mean square value; phase-locked loop (PLL); Phase locked loop
• ISSN: 0018-9200; 1558-173X
• DOI: 10.1109/JSSC.2012.2227609

A 2.4-GHz subharmonically injection-locked PLL (SILPLL) with injection timing calibration is realized. The injection timing issues has been clearly described and modeled mathematically. An injection timing calibration technique is presented to ensure the best phase noise performance. This work is fabricated in 0.18-μm process with 12.6-mW power consumption. The measured phase noises at 1 MHz offset before and after injection are -114 and -129 dBc/Hz, respectively. The measured rms jitter integrated from 1 kHz to 40 MHz before and after injection are 317 and 145 fs, respectively.