Harmonic-Summing Module of SKA on FPGA-Optimizing the Irregular Memory Accesses

• Published in: IEEE transactions on very large scale integration (VLSI) systems Vol. 27; no. 3; pp. 624 - 636
• Main Authors: Wang, Haomiao, Thiagaraj, Prabu, Sinnen, Oliver
• Format: Journal Article
• Language: English
• Published: New York IEEE 01.03.2019; The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
• Subjects: Acceleration; Caching; Energy costs; Energy dissipation; Field programmable gate arrays; Field-programmable gate arrays (FPGAs); Gate arrays; Graphics processing units; harmonic summing; Indexes; irregular memory access optimization; Kernel; Kernels; Modules; Open Computing Language (OpenCL); Optimization; Pulsars; Radio telescopes; Searching; Signal processing
• ISSN: 1063-8210; 1557-9999
• DOI: 10.1109/TVLSI.2018.2882238

The Square Kilometer Array, which will be the world's largest radio telescope, will enhance and boost a large number of science projects, including the search for pulsars. The frequency-domain acceleration search is an efficient approach to search for binary pulsars. A significant part of it is the harmonic-summing module, which is the research subject of this paper. Most of the operations in the harmonic-summing module are relatively cheap operations for field-programmable gate arrays (FPGAs). The main challenge is the large number of point accesses to off-chip memory, which are not consecutive but irregular. Having the harmonic summing on the FPGA will avoid off-board communication with other pulsar search modules, which could destroy other acceleration benefits. Two types of harmonic-summing approaches are investigated in this paper: 1) storing intermediate data in off-chip memory and 2) processing the input signals directly without storing. For the second type, two approaches of caching data are proposed and evaluated: 1) preloading points that are frequently touched and 2) preloading all necessary points that are used to generate a chunk of output points. Open Computing Language (OpenCL) is adopted to implement the proposed approaches. In an extensive experimental evaluation, the same OpenCL kernel codes are evaluated on FPGA boards and GPU cards. Regarding the proposed preloading methods, preloading all necessary points method while reordering the input signals is faster than all the other methods. While in raw performance, a single-FPGA board cannot compete with a GPU. Regarding energy dissipation, GPU costs up to <inline-formula> <tex-math notation="LaTeX">2.6\times </tex-math></inline-formula> times more energy than that of FPGAs in executing the same NDRange kernels.