A CMOS/CCD 256-stage programmable transversal filter

A 256-stage programmable analog-binary correlator fabricated in a combined CMOS buried n-channel CCD technology is reported. The correlator features three-level reference weighting at each stage (+1, -1, 0), low code dependent bias, automatic CCD input bias adjustment, high-speed clock drivers, and...

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Bibliographic Details
Published inIEEE journal of solid-state circuits Vol. 17; no. 6; pp. 1062 - 1069
Main Authors Tower, J.R., Angle, R.L., Kent, D.S., Elliott, L.D., Gandolfo, D.A., Sproat, R.H.
Format Journal Article
LanguageEnglish
Published IEEE 01.12.1982
Subjects
Charge coupled devices
Clocks
CMOS technology
Correlators
Demodulation
Frequency shift keying
Laboratories
Poles and towers
Signal processing
Transversal filters
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Summary:A 256-stage programmable analog-binary correlator fabricated in a combined CMOS buried n-channel CCD technology is reported. The correlator features three-level reference weighting at each stage (+1, -1, 0), low code dependent bias, automatic CCD input bias adjustment, high-speed clock drivers, and low power dissipation. Correlation performance is presented at sampling frequencies from 10 kHz to 25 MHz.
Bibliography:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
ISSN:0018-9200
1558-173X
DOI:10.1109/JSSC.1982.1051861