Arithmetic ternary operations on delta-modulated signals and their application in the realization of digital filters

This correspondence shows a method for determining the ternary delta sequence of the third of the sum of two analog signals through their corresponding delta sequences. The hardware implementation proposed here is modular employing a universal logic T-gate which allows building both sequential and c...

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Bibliographic Details
Published inIEEE transactions on acoustics, speech, and signal processing Vol. 33; no. 3; pp. 760 - 764
Main Authors Zrilic, D., Mavretic, A., Freedman, M.
Format Journal Article
LanguageEnglish
Published New York, NY IEEE 01.06.1985
Institute of electrical and electronics engineers
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Summary:This correspondence shows a method for determining the ternary delta sequence of the third of the sum of two analog signals through their corresponding delta sequences. The hardware implementation proposed here is modular employing a universal logic T-gate which allows building both sequential and combinatorial circuits. The primary advantage of a ternary nonredundant symmetric presentation of the TDM over a binary DM presentation is the reduction of problems of carry propagation in arithemetic operation and reduction in connections and interconnections between chips and interchips.
ISSN:0096-3518
DOI:10.1109/TASSP.1985.1164608